Process Variability and Device Mismatch

The types of process variation causing device mismatch are investigated. A set of test structures intended to examine a broad range of device and mismatch causes has been fabricated. Some sample results obtained by statistical processing of electrical measurements are presented. 1.0 Introduction Mismatch is defined as the difference in the value of a device parameter among identically designed devices. There are certain kinds of process parameter variation whose combined effect causes device mismatch. The first kind of variation is related to the specific layout geometry and is caused by other structures surrounding the devices. Lithographic and etch rate effects such as ‘microloading’ are some causes. Dummy devices are used to create a similar environment for devices that we desire to be matched. The necessary number and size of the dummy devices are investigated below. The second kind of variation is large gradients. In a well controlled production line, significant part of this kind is repeatable, with systematic components in the die and the wafer. The die components are attributed mainly to non-uniform behavior of the stepper across the stepper field. The wafer components are due to processing imperfections during operations that affect the entire surface of the wafer, such as non uniform photoresist deposition, nonuniform implantation, and temperature or gas concentration variation across the surface during oxidation. Close spacing and common centroid geometry are used to minimize the effect of the large gradients of variation. The third kind is local random fluctuations of the process parameters that resemble spatial white noise. Some examples are the thickness variation in a poly1poly2 capacitor because of the granular nature of polysilicon, the randomly varying number of implanted ions per unit area, and the edge roughness. Making the devices large minimizes this kind of variation. Finally, the relative orientation among the devices can affect matching. The physical properties of the material and the processing characteristic can depend on direction. Misalignment effects do not cause mismatch on parallel devices, while they do on devices with perpendicular orientation. If the devices are directional, such as the MOS transistors, mismatch can be caused in parallel devices by currents flowing in opposite directions. 2.0 Mismatch Theory The local random fluctuations and the large gradients of variation have been successfully modeled before [1]-[4]. A derivation of a model exists in [1] for MOS transistors, but the method and the results can be applied to any kind of device. It will be outlined here, in order to investigate how this model could be extended to include deep submicron devices. In general, a device parameter P can be expressed as a function of the effective values of n process parameters , ,... , which are physical quantities, such as dimensions and implanted ion concentrations . (1) Effective values are defined as the lumped values of the process parameters that when used in the model equation (1) give the correct value for the device parameter, which in reality depends on the value of the process parameters at every point in the area of the device. Since the variation of a process parameter in the area of the device is generally small compared to its average value, it is reasonable to consider that the effective value is equal to the average. The process parameters , ,... are physical quantities defined by different mechanisms and can usually be considered uncorrelated. In this case the mismatch variance of the device parameter P between the two identically designed devices in distance D depicted in Figure 1, is given by